1. Stats
  2. USPTO
  3. TC 2800
  4. Group 28XX
  5. Art Unit 2851
  6. Examiner Lin

Examiner Lin Aric

2851-LIN-ARIC

Employment Information

Art Unit:2851 — Computer-aided design and analysis of circuits and semiconductor masks
Group:28XX — Semiconductors B
Classes: 716 — Computer-aided design and analysis of circuits and semiconductor masks
320 — Electricity: battery or capacitor charging or discharging
703 — Data processing: structural design, modeling, simulation, and emulation
717 — Data processing: software development, installation, and management
257 — Active solid-state devices (e.g., transistors, solid-state diodes)
702 — Data processing: measuring, calibrating, or testing
438 — Semiconductor device manufacturing: process
714 — Error detection/correction and fault detection/recovery
706 — Data processing: artificial intelligence
Phone:(571) 270-3090
Email:aric.lin@uspto.gov
Location:VA 22314
Title:Pat Examnr Elctrl Engrg
Service:19 years
Grade:GS-13

Grant Rate and Difficulty Ranking

73
3-Year Grant rate: 59% over 182 cases
Difficulty: Harder
Difficulty Percentile: 73rd

With Examiner Lin, you have a 59% chance of getting an issued patent by 3 years after the first office action. Examiner Lin is a harder examiner and in the 73rd percentile across all examiners (with 100th percentile most difficult).

Grant Rate

Grant Rate Timeline

Below is the grant rate timeline for Examiner Lin, where the timeline is relative to the date of the first office action. The three-year grant rate is the percentage of applications granted at three years after the first office action.

Comparison with Art Unit 2851

Examiner Lin's grant rate is lower than that of Art Unit 2851 and lower than that of the USPTO.

Average Office Actions Per Grant
Examiner Lin 1.9
Art Unit 2851 1.0

Interview Benefit

Grant Rate without Interview

Examiner Lin has granted 53 of 92 cases without any applicant-requested interviews for a grant rate of 58%.

Grant Rate with Interview

Examiner Lin has granted 55 of 90 cases with at least one applicant-requested interview for a grant rate of 61%.

Interview Benefit

With Examiner Lin, conducting an interview increases your chance of getting a patent granted by 5%.

Recent Dispositions

Recent Dispositions

Number Title OA Rejections Status IFW
17723378 Conductor Routing In High Energy Wireless Power Transfer Pads Rejection information available with a Premium Stats subscription. See our pricing. Patented View
17934239 Single Corner Mixed Voltage Noise Impact On Function Analysis Patented View
17695093 Hierarchical Floor-Planning For Rapid Fpga Prototyping Abandoned View
17579770 Wireless Charger Abandoned View
17701095 Method For Recognizing Analog Circuit Structure Abandoned View
17113328 Wireless Charging Apparatus And Terminal Using Same Patented View
17574876 Systems And Methods For Incorporating Manufacturing, Testing And After Sale Data In A Printed Circuit Board Using Blockchain Abandoned View
17237558 Systems And Methods For Designing Photomasks Abandoned View
17573462 Systems And Methods For Reducing Test Point Power Consumption In A Circuit Design Patented View
17677369 Power Charging Device Abandoned View
19206061 Ai-Based Automated Circuit Generation Method Patented View
17667478 Failsafe Circuit, Layout, Device, And Method Patented View
17406190 Battery Control Device And Battery System Patented View
17548402 Quantum Codes Implemented Using Cat Data Qubits And Transmon Ancilla Qubits Patented View
16232583 Method And Apparatus Of Emulation Techniques For Enhanced Fpga Validation Abandoned View
17627332 Generating Digital Circuits Abandoned View
17745224 Integrated Circuit Layouts With Fill Feature Shapes Patented View
17279201 Method To Detect Vehicle Battery Type Before Charge Patented View
18466589 Channel Sizing For Inter-Kernel Communication Abandoned View
17548259 Extending Cover Properties In Formal Verification To Generate Failure Traces That Reach End-Of-Test Patented View
17445493 Dcdc Converter Abandoned View
18333259 Integrated Circuit, System And Method Of Forming The Same Patented View
16882217 Automated Circuit Generation Abandoned View
17463040 Automated Debug Of Falsified Power-Aware Formal Properties Using Static Checker Results Abandoned View
18323593 Integrated Circuit Stack Verification Method And System For Performing The Same Patented View
17680234 Method And System For Generating And Regulating Local Magnetic Field Variations For Spin Qubit Manipulation Using Micro-Structures In Integrated Circuits Abandoned View
18793209 System And Computer-Readable Medium For Improving The Critical Path Delay Of A Fpga Routing Tool At Smaller Channel Widths Patented View
17546408 Synthesizable Logic Memory Abandoned View
17238777 Pre-Launch Energy Harvesting On Aerodynamic Systems Abandoned View
17388121 Electronic Circuits Including Hybrid Voltage Threshold Logical Entities Patented View
17406179 Battery Pack And Combination Of The Battery Pack And A Power Tool Patented View
17307270 Communication Coordination And Node Synchronization For Enhanced Quantum Circuit Operation Employing A Hybrid Classical/quantum System Patented View
17406644 Insulation Resistance Detection System For Electric Vehicle And Insulation Resistance Detection Method Thereof Patented View
17644424 Selective Filtering For Fast Driving Of Qubits Abandoned View
17468319 Logical Clock Connection In An Integrated Circuit Design Patented View
16596732 Tool Control Using Multistage Lstm For Predicting On-Wafer Measurements Patented View
17693236 Fast Synthesis Of Logical Circuit Design With Predictive Timing Patented View
16925500 Systems And Methods For Generating Synthesizable Netlists From Register Transfer Level Designs Patented View
17375790 Framework For Automated Synthesis Of Secure, Optimized System-On-Chip Architectures Abandoned View
18114845 Method Of Manufacturing Photo Masks Abandoned View
18538946 Quantum Noise Process Analysis Method And Apparatus, Device, And Storage Medium Patented View
17364565 Automated Design Of Field Programmable Gate Array Or Other Logic Device Based On Artificial Intelligence And Vectorization Of Behavioral Source Code Abandoned View
17126895 Method And Apparatus For Estimating State Of Charge Of Battery Abandoned View
18328800 Routing Structure And Method Of Wafer Substrate With Standard Integration Zone For Integration On-Wafer Patented View
17406329 Power Feeding Control Device, Power Feeding System, And Power Feeding Method Patented View
17501764 Method And Device For Processing Quantum Data Abandoned View
16831583 High Efficiency Bidirectional Charge Balancing Of Battery Cells Abandoned View
17490496 Method, Product, And System For Rapid Sequence Classification Through A Coverage Model Patented View
17269340 Charging Device And Charging System Abandoned View
17370930 Electronic Signal Verification Using A Translated Simulated Waveform Abandoned View

Appeals Statistics

Purchase Subscription

Subscribe to Premium Examiner Statistics for unlimited access for your law firm.

Disclaimer: We do not provide any guarantees as to the accuracy of the statistics presented above and under
no circumstances will we be liable for any outcome resulting from your reliance on the above statistics.