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| Art Unit: | 2851 — Computer-aided design and analysis of circuits and semiconductor masks |
|---|---|
| Group: | 28XX — Semiconductors B |
| Classes: |
716 — Computer-aided design and analysis of circuits and semiconductor masks 320 — Electricity: battery or capacitor charging or discharging 703 — Data processing: structural design, modeling, simulation, and emulation 706 — Data processing: artificial intelligence 257 — Active solid-state devices (e.g., transistors, solid-state diodes) 708 — Electrical computers: arithmetic processing and calculating 174 — Electricity: conductors and insulators 700 — Data processing: generic control systems or specific applications 380 — Cryptography 714 — Error detection/correction and fault detection/recovery |
| Phone: | (571) 270-7098 |
| Email: | eric.lee@uspto.gov |
| Location: | VA 22314 |
| Title: | Pat Examnr Elctrl Engrg |
| Service: | 16 years |
| Grade: | GS-14 |
| 3-Year Grant rate: | 90% over 310 cases |
|---|---|
| Difficulty: | Very Easy |
| Difficulty Percentile: | 18th
|
With Examiner Lee, you have a 90% chance of getting an issued patent by 3 years after the first office action. Examiner Lee is a very easy examiner and in the 18th percentile across all examiners (with 100th percentile most difficult).
Below is the grant rate timeline for Examiner Lee, where the timeline is relative to the date of the first office action. The three-year grant rate is the percentage of applications granted at three years after the first office action.
Examiner Lee's grant rate is lower than that of Art Unit 2851 and higher than that of the USPTO.
| Average Office Actions Per Grant | |
|---|---|
| Examiner Lee | 1.1 |
| Art Unit 2851 | 1.0 |
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Disclaimer: We do not provide any guarantees as to the accuracy of the statistics presented above and under
no circumstances will we be liable for any outcome resulting from your reliance on the above statistics.