1. Stats
  2. USPTO
  3. TC 2800
  4. Group 2810-2820
  5. Art Unit 2824
  6. Examiner Leboeuf

Examiner Leboeuf Jerome L

2824-LEBOEUF-JEROME-L

Employment Information

Art Unit:2824 — Static information storage and retrieval
Group:2810-2820 — Semiconductors A/Memory
Classes: 365 — Static information storage and retrieval
257 — Active solid-state devices (e.g., transistors, solid-state diodes)
711 — Electrical computers and digital processing systems: memory
708 — Electrical computers: arithmetic processing and calculating
707 — Data processing: database and file management or data structures
706 — Data processing: artificial intelligence
703 — Data processing: structural design, modeling, simulation, and emulation
716 — Computer-aided design and analysis of circuits and semiconductor masks
Phone:(571) 272-7612
Email:jerome.leboeuf@uspto.gov
Location:VA 22314
Title:Pat Examnr Elctrl Engrg
Service:12 years
Grade:GS-14

Grant Rate and Difficulty Ranking

33
3-Year Grant rate: 85% over 316 cases
Difficulty: Easier
Difficulty Percentile: 33rd

With Examiner Leboeuf, you have a 85% chance of getting an issued patent by 3 years after the first office action. Examiner Leboeuf is an easier examiner and in the 33rd percentile across all examiners (with 100th percentile most difficult).

Grant Rate

Grant Rate Timeline

Below is the grant rate timeline for Examiner Leboeuf, where the timeline is relative to the date of the first office action. The three-year grant rate is the percentage of applications granted at three years after the first office action.

Comparison with Art Unit 2824

Examiner Leboeuf's grant rate is lower than that of Art Unit 2824 and higher than that of the USPTO.

Average Office Actions Per Grant
Examiner Leboeuf 1.4
Art Unit 2824 1.0

Interview Benefit

Grant Rate without Interview

Examiner Leboeuf has granted 150 of 182 cases without any applicant-requested interviews for a grant rate of 82%.

Grant Rate with Interview

Examiner Leboeuf has granted 120 of 134 cases with at least one applicant-requested interview for a grant rate of 90%.

Interview Benefit

With Examiner Leboeuf, conducting an interview increases your chance of getting a patent granted by 10%.

Recent Dispositions

Recent Dispositions

Number Title OA Rejections Status IFW
18553253 Field-Programmable Ferro-Diodes For Reconfigurable In-Memory-Computing Rejection information available with a Premium Stats subscription. See our pricing. Patented View
18389439 Power Saving During Open Block Read With Large Block Openness Patented View
17163155 Elemental Composition Tuning For Chalcogenide Based Memory Arranged In A Plurality Of Decks Patented View
18460437 Semiconductor Device With A Selector Layer Patented View
18032410 Semiconductor Device And Operation Method Thereof With Non-Polarizing Reading Operation Patented View
18484513 Controlling Memory Device Using Group Recovery Times And Method Thereof Patented View
17874867 Voltage Regulation System Patented View
18201888 Method Of Testing Storage Controller Included In Storage Device Patented View
18533913 Memory Calibration With Reduced Calibration Parameters Patented View
18225879 Three-Dimensional Vertical Nor Flash Thin Film Transistor Strings Patented View
18441881 Memory Cell Using Data Storing Bipolar Device Patented View
18460473 Semiconductor Device With Selectively Coupled Resistors In Conduction Paths Patented View
18376762 Ferroelectric Nanoparticle Capacitor For Non-Binary Logics And Method Of Operation Patented View
18497402 Methods For Reducing Disturb Errors By Refreshing Data Alongside Programming Or Erase Operations Patented View
18225735 Loop Dependent Bit Line And Read Biases In A Memory Device Patented View
18287462 Memristor, Method Of Calculating Hamming Distance, And In-Memory Computing Integration Application Patented View
17671091 Spike Based Programming Of A Memory Cell To Reset State Patented View
18357467 Non-Volatile Memory With Dummy Word Line Assisted Pre-Charge Patented View
18320318 Storage Controller Generating Read Voltages For Soft Decision Decoding Based On Read Information And Decoding Information, Storage Device Including The Same, And Operating Method Thereof Patented View
17481504 Hybrid Stacked Field Effect Transistors Patented View
17874611 Buried Metal Techniques Patented View
18321898 Phase Change Material Switch Circuit For Enhanced Signal Isolation And Methods Of Forming The Same Patented View
18517320 Crossbar Circuits For Performing Convolution Operations Patented View
18522640 Electrochemical Random Access Memory Device With Contact Layer As A Heat Source Patented View
18188475 Memory Device And Memory System For Using Read Compensation Scheme And Operating Method Of The Same Patented View
18430136 Processing In Memory Patented View
18467094 Memory Device Determining Target Resistance States Patented View
18124576 Semiconductor Die Having On-Die Power Switch For Selecting Target Operation Voltage From Operation Voltages Provided By Different Power Sources Patented View
18025009 Semiconductor Device With First And Second Elements And Electronic Device Patented View
17877714 Memory Device With Memory Strings Using Variable Resistance Memory Regions Patented View
18181851 Chip Bonded Semiconductor Memory Device With Different Charge Storage Films Patented View
18669140 Multi-State Programming Of Memory Cells Patented View
18188729 Phase Change Material Including Deuterium Patented View
17986628 Memory Device And Operating Method Of The Memory Device For Controlling A Channel Voltage Patented View
18413107 Resistive Memory Devices Using A Carbon-Based Conductor Line And Methods For Forming The Same Patented View
18045881 Sram With Reconfigurable Setting Patented View
18447232 Semiconductor Devices With A Double Sided Word Line Structure Patented View
17315303 Method And Apparatus For Memory Chip Row Hammer Threat Backpressure Signal And Host Side Response Patented View
18373741 Data Integrity Checks Based On Voltage Distribution Metrics Patented View
18205417 Method Of Rram Write Ramping Voltage In Intervals Patented View
18167819 Signal Control Circuit, Signal Control Method For Blocking Activation Operations And Semiconductor Memory Patented View
17450691 Tuning Perpendicular Magnetic Anisotropy Of Heusler Compound In Mram Devices Patented View
18375869 Multi-Gate Nor Flash Thin-Film Transistor Strings Arranged In Stacked Horizontal Active Strips With Vertical Control Gates Patented View
18092115 Method For Locating Boundary Page Line In Memory Device, Memory Device, And Memory System Thereof Patented View
18653418 Multi-Bit Storage Device Using Phase Change Material Patented View
18055588 Apparatuses And Methods For Input Buffer Data Feedback Equalization Circuits Patented View
17230889 Ultra High-Bandwidth Artificial Intelligence (Ai) Processor With Dram Under The Processor Patented View
17865381 Low_powered Memory Device And Method Of Controlling Power Of The Same Abandoned View
18059124 Memory Device And Test Method Of Memory Device Patented View
17749364 Semiconductor Memory Device And Memory System Patented View

Appeals Statistics

Purchase Subscription

Subscribe to Premium Examiner Statistics for unlimited access for your law firm.

Disclaimer: We do not provide any guarantees as to the accuracy of the statistics presented above and under
no circumstances will we be liable for any outcome resulting from your reliance on the above statistics.