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| Art Unit: | 2811 — Active solid-state devices (e.g., transistors, solid-state diodes) |
|---|---|
| Group: | 2810-2820 — Semiconductors A/Memory |
| Classes: |
257 — Active solid-state devices (e.g., transistors, solid-state diodes) 438 — Semiconductor device manufacturing: process 702 — Data processing: measuring, calibrating, or testing 703 — Data processing: structural design, modeling, simulation, and emulation 623 — Prosthesis (i.e., artificial body members), parts thereof, or aids and accessories therefor 310 — Electrical generator or motor structure 136 — Batteries: thermoelectric and photoelectric 451 — Abrading 700 — Data processing: generic control systems or specific applications |
| Phone: | (571) 270-7891 |
| Email: | christine.enad@uspto.gov |
| Location: | VA 22314 |
| Title: | Pat Examnr Computer Science |
| Service: | 18 years |
| Grade: | GS-14 |
| 3-Year Grant rate: | 92% over 585 cases |
|---|---|
| Difficulty: | Very Easy |
| Difficulty Percentile: | 14th
|
With Examiner Enad, you have a 92% chance of getting an issued patent by 3 years after the first office action. Examiner Enad is a very easy examiner and in the 14th percentile across all examiners (with 100th percentile most difficult).
Below is the grant rate timeline for Examiner Enad, where the timeline is relative to the date of the first office action. The three-year grant rate is the percentage of applications granted at three years after the first office action.
Examiner Enad's grant rate is higher than that of Art Unit 2811 and higher than that of the USPTO.
| Average Office Actions Per Grant | |
|---|---|
| Examiner Enad | 1.6 |
| Art Unit 2811 | 1.6 |
Examiner Enad has granted 394 of 432 cases without any applicant-requested interviews for a grant rate of 91%.
Examiner Enad has granted 144 of 153 cases with at least one applicant-requested interview for a grant rate of 94%.
With Examiner Enad, conducting an interview increases your chance of getting a patent granted by 3%.
| Number | Title | OA Rejections | Status | IFW |
|---|---|---|---|---|
| 18225028 | Method Of Forming Multiple-Vt Fets For Cmos Circuit Applications | Rejection information available with a Premium Stats subscription. See our pricing. | Patented | View |
| 18104480 | Semiconductor Devices And Methods Of Fabrication Thereof | Patented | View | |
| 18650026 | Semiconductor Device And Forming Method Thereof | Patented | View | |
| 18448188 | Semiconductor Structure And Method Of Manufacturing The Same | Patented | View | |
| 17842169 | Method For Removing Edge Of Substrate In Semiconductor Structure | Patented | View | |
| 17934400 | Transistor Devices With Double-Side Contacts | Patented | View | |
| 18195150 | 3d-Stacked Transistor Structure With Barrier Layer Between Upper Gate Structure And Lower Gate Structure | Patented | View | |
| 17711854 | Junction Field Effect Transistors For Low Voltage And Low Temperature Operation | Patented | View | |
| 18325412 | Semiconductor Devices | Patented | View | |
| 17863741 | Methods Of Manufacturing Semiconductor Devices | Patented | View | |
| 17648010 | Epitaxy Regions With Reduced Loss Control | Patented | View | |
| 17892864 | Semiconductor Device With Reverse-Cut Source/drain Contact Structure And Method Thereof | Patented | View | |
| 18347813 | Self-Aligned Patterning Layer For Metal Gate Formation | Patented | View | |
| 18040505 | Light-Emitting Substrate, Method For Manufacturing The Same, And Display Device | Patented | View | |
| 18049036 | Semiconductor Device And Method Of Fabricating The Same | Patented | View | |
| 17566402 | Optimizing Stress In A Hybrid Vertical-Pfet And Horizontal-Nfet Nanosheet Structure | Patented | View | |
| 17950434 | Three-Dimensional Semiconductor Device And Method Of Fabricating The Same | Patented | View | |
| 18519714 | Semiconductor Device Contact Structures And Methods Of Fabricating Thereof | Patented | View | |
| 17577996 | Semiconductor Memory Device And Method For Manufacturing The Same | Patented | View | |
| 18786372 | 3d Semiconductor Device And Structure With Logic Circuits, Memory Cells, And Processor Array | Patented | View | |
| 18098465 | Light Emitting Display Device | Patented | View | |
| 18677372 | Isolation Structures For Semiconductor Devices | Patented | View | |
| 18654766 | Semiconductor Device And Method | Patented | View | |
| 17676470 | Dummy Fin Structures And Methods Of Forming Same | Patented | View | |
| 17623639 | Lamination Wafers And Method Of Producing Bonded Wafers Using The Same | Patented | View | |
| 17946546 | Stacked Fets With Contact Placeholder Structures | Patented | View | |
| 17989944 | Semiconductor Device | Patented | View | |
| 18400951 | High-K Gate Dielectric | Patented | View | |
| 17690595 | Method And Structure For Metal Tracks In Semiconductor Devices | Patented | View | |
| 17799272 | Nitride Semiconductor Device, And Method Of Manufacturing Nitride Semiconductor Device | Patented | View | |
| 17644528 | Cross Bar Vertical Fets | Patented | View | |
| 18595069 | Lighting Emitting Stacked Structure And Display Device Having The Same | Patented | View | |
| 17674231 | Built-In Component Board, Method Of Manufacturing The Built-In Component Board | Patented | View | |
| 18655832 | Finfet Device And Method | Patented | View | |
| 18232272 | Core-Shell Nanostructures For Semiconductor Devices | Patented | View | |
| 17630906 | Display Device, Display Panel And Manufacturing Method Thereof, Driving Circuit And Driving Method | Patented | View | |
| 17675809 | High Dielectric Constant Metal Gate Mos Transistor And Method For Making The Same | Abandoned | View | |
| 18739519 | Gate Structures For Semiconductor Devices | Patented | View | |
| 17709374 | Integrated Circuit Structures Having Backside Gate Tie-Down | Patented | View | |
| 18357796 | Metal Gate Stacks And Methods Of Fabricating The Same In Multi-Gate Field-Effect Transistors | Patented | View | |
| 18366871 | Gate Structure And Method Of Forming Same | Patented | View | |
| 18090721 | Semiconductor Device With Work Function Layer | Patented | View | |
| 18737616 | Integrated Circuit Structures Including A Titanium Silicide Material | Patented | View | |
| 18408438 | Method Of Manufacturing Semiconductor Devices And Semiconductor Devices | Patented | View | |
| 18634782 | Integrated Circuit With Backside Power Rail And Backside Interconnect | Patented | View | |
| 17965927 | Semiconductor Device | Patented | View | |
| 18736589 | Semiconductor Structure | Patented | View | |
| 18670123 | Semiconductor Device Having Fins And Method Of Fabricating The Same | Patented | View | |
| 17892415 | Semiconductor Device | Patented | View | |
| 18594073 | Low Resistance Fill Metal Layer Material As Stressor In Metal Gates | Patented | View |
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