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| Art Unit: | 2132 — Electrical computers and digital processing systems: memory |
|---|---|
| Group: | 2130 — Memory Access and Control |
| Classes: |
711 — Electrical computers and digital processing systems: memory 718 — Electrical computers and digital processing systems: virtual machine task or process management or task management/control 712 — Electrical computers and digital processing systems: processing architectures and instruction processing (e.g., processors) 713 — Electrical computers and digital processing systems: support 706 — Data processing: artificial intelligence 719 — Electrical computers and digital processing systems: interprogram communication or interprocess communication (ipc) 700 — Data processing: generic control systems or specific applications |
| Phone: | (571) 270-1030 |
| Email: | edward.dudek@uspto.gov |
| Location: | VA 22314 |
| Title: | Pat Examnr Compr Engrg |
| Service: | 20 years |
| Grade: | GS-14 |
| 3-Year Grant rate: | 94% over 444 cases |
|---|---|
| Difficulty: | Extremely Easy |
| Difficulty Percentile: | 8th
|
With Examiner Dudek, you have a 94% chance of getting an issued patent by 3 years after the first office action. Examiner Dudek is an extremely easy examiner and in the 8th percentile across all examiners (with 100th percentile most difficult).
Below is the grant rate timeline for Examiner Dudek, where the timeline is relative to the date of the first office action. The three-year grant rate is the percentage of applications granted at three years after the first office action.
Examiner Dudek's grant rate is higher than that of Art Unit 2132 and higher than that of the USPTO.
| Average Office Actions Per Grant | |
|---|---|
| Examiner Dudek | 1.3 |
| Art Unit 2132 | 1.4 |
Examiner Dudek has granted 308 of 331 cases without any applicant-requested interviews for a grant rate of 93%.
Examiner Dudek has granted 108 of 113 cases with at least one applicant-requested interview for a grant rate of 96%.
With Examiner Dudek, conducting an interview increases your chance of getting a patent granted by 3%.
| Number | Title | OA Rejections | Status | IFW |
|---|---|---|---|---|
| 18756399 | Memory Device Log Data Storage | Rejection information available with a Premium Stats subscription. See our pricing. | Patented | View |
| 18782432 | Reduced Latency Content Prefetching With Local Behavioral Profiles | Patented | View | |
| 18796285 | Systems, Methods, And Apparatus For Computational Storage Functions | Patented | View | |
| 18634584 | Assigning Blocks Of Memory Systems | Patented | View | |
| 18770824 | Memory Management Method And Device, Chip, And Traffic Apparatus | Patented | View | |
| 18540448 | Partitioned Transferring For Write Booster | Patented | View | |
| 18226932 | Memory Controller And Near-Memory Support For Sparse Accesses | Patented | View | |
| 18584329 | Super Block Management Method And Apparatus | Patented | View | |
| 18747185 | Persistent Memory Across Updates | Patented | View | |
| 18662952 | Power-Off Monitor For Relaxed Block Retirement In A Memory Sub-System | Patented | View | |
| 18762391 | Electronic Device For Acessing An Sd Card With Combined Address, And Method Thereof | Patented | View | |
| 18892923 | Storage System, Storage Device, And Booting Method | Patented | View | |
| 18391209 | Preemptive Write Suspension In Memory Systems | Patented | View | |
| 18654494 | Physical Host Optimizing Memory Migration, Operation Method Of Physical Host, And Computer-Readable Storage Medium Thereof | Patented | View | |
| 18630173 | Systems And Methods For Statistical-Based Io Write Pending Aging | Patented | View | |
| 18413607 | Memory System With Controller Configured To Fetch Commands | Patented | View | |
| 18751917 | Apparatuses And Methods For Data Movement | Patented | View | |
| 18685213 | Method And System, Device And Medium For Data Segmentation And Check Information Calculation | Patented | View | |
| 18760599 | Nonvolatile Memory Device And Operation Method Thereof, And Storage Device Including The Same | Patented | View | |
| 17936345 | Memory Power Performance State Optimization During Image Display | Patented | View | |
| 18421352 | Storage Device For Performing A State Shaping Operation On Data Based On A Speed Characteristic Of A Memory Cell And Operation Method Thereof | Patented | View | |
| 18608674 | Multi-Domain Configurable Data Compressor/de-Compressor | Patented | View | |
| 18651590 | Multiple-Pass Programming Of Memory Cells Using Temporary Parity Generation | Patented | View | |
| 18586337 | Memory System Including A Nonvolatile Memory And A Memory Controller That Controls The Nonvolatile Memory Based On Profile, And Information Processing System Including The Memory System | Patented | View | |
| 18243551 | Systems, Methods, And Media For Reducing Power Consumption Of Multi-Plane Non-Volatile Memory Solid-State Drives | Patented | View | |
| 17688631 | Systems And Methods For Accessing Memory Devices Using Virtual Memory Ranks | Patented | View | |
| 18626379 | Secure Hardware Access In A Heterogeneous Computing Platform | Patented | View | |
| 18629333 | Combining Data Block I/o And Checksum Block I/o Into A Single I/o Operation During Processing By A Storage Stack | Patented | View | |
| 18441869 | Reliable And Efficient Boot Logical Unit Access | Patented | View | |
| 18399469 | Cost Reduced High Reliability Fault Tolerant Computer Architecture | Patented | View | |
| 18670908 | Memory Controller For Communicating Memory Status Information, Memory System Including The Memory Controller, And Operating Method Of The Memory Controller | Patented | View | |
| 18612379 | Promoting Nvme Private Namespace To Shared Namespace | Patented | View | |
| 18684927 | Data Processing Method And System, Device, Storage System And Medium Based On Access Units With Different Data Capacities | Patented | View | |
| 18390853 | Fine-Grained Clocking And Clock Distribution In Low Power Double Data Rate Physical Layer Interface | Patented | View | |
| 18618350 | Reserved Persistent Random Access Memory | Patented | View | |
| 18332112 | Super-Temporal Cache Replacement Policy | Patented | View | |
| 18736132 | Memory Devices And Operation Methods Thereof, And Memory Systems And Storage Mediums | Patented | View | |
| 18410558 | Memory System Restoring Changed Data And Method Of Programming The Same | Patented | View | |
| 18513800 | Method, Electronic Device, And Computer Program Product For Compressing Data Based On Segment Io Counts Of Respective Time Segments For A Storage Area | Patented | View | |
| 18390296 | Enhanced Bit Error Rate Estimation Scan Process | Patented | View | |
| 18388684 | Memory Controller For Managing Journal Data, And Operating Method Of The Memory Controller | Patented | View | |
| 18531350 | Obfuscation Of Data In A Memory | Patented | View | |
| 18663978 | Adaptive Sensing Time For Memory Operations | Patented | View | |
| 17514530 | Memory Pool Management | Patented | View | |
| 18394442 | Memory Design For A Processor | Patented | View | |
| 18162339 | Autonomous Edge Computing System Management | Patented | View | |
| 18595014 | Optimizing I/o Operations For Compressed Data | Patented | View | |
| 18497087 | Storage Device With Variable Cell Area Size And Operating Method Thereof | Patented | View | |
| 18236939 | Method And Apparatus For Performing Data Access Management Of Memory Device In Predetermined Communications Architecture With Aid Of Multi-Table Checking | Patented | View | |
| 18415273 | Memory Device, Memory System, And Method For Data Calculation With The Memory Device | Patented | View |
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