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| Art Unit: | 2184 — Electrical computers and digital data processing systems: input/output |
|---|---|
| Group: | 2180 — Computer Architecture, I/O, Modeling and Simulation |
| Classes: |
712 — Electrical computers and digital processing systems: processing architectures and instruction processing (e.g., processors) 710 — Electrical computers and digital data processing systems: input/output 711 — Electrical computers and digital processing systems: memory 706 — Data processing: artificial intelligence 708 — Electrical computers: arithmetic processing and calculating 718 — Electrical computers and digital processing systems: virtual machine task or process management or task management/control 417 — Pumps 700 — Data processing: generic control systems or specific applications 726 — Information security 713 — Electrical computers and digital processing systems: support |
| Phone: | (571) 270-1971 |
| Email: | steven.snyder@uspto.gov |
| Location: | VA 22314 |
| Title: | Pat Examnr Compr Engrg |
| Service: | 19 years |
| Grade: | GS-14 |
| 3-Year Grant rate: | 90% over 334 cases |
|---|---|
| Difficulty: | Very Easy |
| Difficulty Percentile: | 18th
|
With Examiner Snyder, you have a 90% chance of getting an issued patent by 3 years after the first office action. Examiner Snyder is a very easy examiner and in the 18th percentile across all examiners (with 100th percentile most difficult).
Below is the grant rate timeline for Examiner Snyder, where the timeline is relative to the date of the first office action. The three-year grant rate is the percentage of applications granted at three years after the first office action.
Examiner Snyder's grant rate is higher than that of Art Unit 2184 and higher than that of the USPTO.
| Average Office Actions Per Grant | |
|---|---|
| Examiner Snyder | 1.4 |
| Art Unit 2184 | 1.4 |
Examiner Snyder has granted 224 of 248 cases without any applicant-requested interviews for a grant rate of 90%.
Examiner Snyder has granted 76 of 86 cases with at least one applicant-requested interview for a grant rate of 88%.
With Examiner Snyder, conducting an interview decreases your chance of getting a patent granted by 2%.
| Number | Title | OA Rejections | Status | IFW |
|---|---|---|---|---|
| 18724375 | Bus-Based Transaction Processing Method And System, Storage Medium, And Device | Rejection information available with a Premium Stats subscription. See our pricing. | Patented | View |
| 17834427 | Application Programming Interface To Accelerate Matrix Operations | Patented | View | |
| 18789121 | Memory Interface | Patented | View | |
| 18713160 | Method For Execution Of Bus Controller, Computer Device And Storage Medium | Patented | View | |
| 18902735 | Inter-Application Communication Method And Apparatus, Storage Medium, And Program Product | Patented | View | |
| 18117472 | Discrete Three-Dimensional Processor | Patented | View | |
| 17565336 | Iommu Collocated Resource Manager | Patented | View | |
| 18168639 | Systems And Methods For Managing Settings Based Upon Information Handling System (Ihs) Posture And Orientation Using Heterogeneous Computing Platforms | Patented | View | |
| 18744582 | Scalable Data Structure For Aggregating Bmc Input And Output Over Serdes For Data Center And Server Nodes System And Method | Patented | View | |
| 18753679 | Semiconductor Device And Communication System For Updating Setting Data Of Multiple Channels | Patented | View | |
| 18769663 | Multi-Mode Usb-C Connection Cable | Abandoned | View | |
| 18337261 | Computer-Controlled Power Takeoff Driven Motorized Pump System | Patented | View | |
| 18587289 | Decoupling Atomicity From Operation Size | Patented | View | |
| 16908702 | Bandwidth Management Allocation For Displayport Tunneling | Patented | View | |
| 18425165 | Write Streaming With Cache Write Acknowledgment In A Processor | Patented | View | |
| 18513610 | Method For Supporting Erasure Code Data Protection With Embedded Pcie Switch Inside Fpga+ssd | Patented | View | |
| 18420699 | Gray Code Counter Enabled To Increment By Greater Than One | Patented | View | |
| 18534203 | Processor Having Switch Instruction Circuit | Patented | View | |
| 18356103 | Systems And Methods For Routing Multimedia Signals | Patented | View | |
| 17485347 | Apparatus, Computer-Readable Medium, And Method For Reducing Bounds Checking Overhead By Instrumenting Pointer Arithmetic | Patented | View | |
| 18515062 | Application Programming Interface To Accelerate Matrix Operations | Patented | View | |
| 17131741 | Processors, Methods, Systems, And Instructions To Select And Store Data Elements From Strided Data Element Positions In A First Dimension From Three Source Two-Dimensional Arrays In A Result Two-Dimensional Array | Patented | View | |
| 18187888 | Vehicle Communication System, Vehicle Communication Method, And Control Device | Patented | View | |
| 17694670 | Shared Dynamic Buffer In Image Signal Processor | Patented | View | |
| 17867134 | System And Method For Predication Handling | Patented | View | |
| 17559969 | Global Unified Interdependent Multi-Tenant Quality-Of-Service Processor Scheme | Patented | View | |
| 17448806 | Caching Based On Branch Instructions In A Processor | Abandoned | View | |
| 18342490 | Power Takeoff-Driven Refrigeration | Patented | View | |
| 17549192 | Instruction Decode Cluster Offlining | Patented | View | |
| 17134353 | Instructions To Convert From Fp16 To Bf8 | Patented | View | |
| 17790463 | Data Management System And Method Of Controlling Via Input-Output Operations | Abandoned | View | |
| 18374176 | Data Processing Method And Apparatus, And Related Product For Increased Efficiency Of Tensor Processing | Patented | View | |
| 17853793 | Graphics Processing Unit With Network Interfaces | Patented | View | |
| 19083971 | Methods And Systems For Ranking A Plurality Of Worker Agents Based On A User Request | Patented | View | |
| 19083809 | Methods And Systems For Enhancing A Context For Use In Processing, By A Plurality Of Artificial Intelligence Agents, A Request | Patented | View | |
| 18423049 | Systems And Methods For Monitoring An Instruction Bus | Patented | View | |
| 18609622 | Conditional Execution Specification Of Instructions Using Conditional Extension Slots In The Same Execute Packet In A Vliw Processor | Patented | View | |
| 17887245 | Chipset Attached Random Access Memory | Patented | View | |
| 17389155 | Hybrid System Fabric For Enabling Host Operating System And Real-Time Operating System Within Chiplet System-On-Chip | Patented | View | |
| 18627907 | Instructions To Convert From Fp16 To Bf8 | Patented | View | |
| 18473414 | Tracking Instruction Handling Using Opcode Matching In Processor-Based Devices | Patented | View | |
| 18491455 | Processing Unit Employing Micro-Operations (Micro-Ops) Random Access Memory (Ram) As Main Program Memory | Patented | View | |
| 17372060 | Intelligent Robotic Process Automation Bot Development Using Convolutional Neural Networks | Patented | View | |
| 17971638 | Discrete Three-Dimensional Processor | Patented | View | |
| 18664035 | Neural Networks For Embedded Devices | Patented | View | |
| 18483064 | System And Method Of Digital To Analog Conversion Using Dynamic Element Matching | Patented | View | |
| 18628403 | Processor Operand Management Using Fusion Buffer | Patented | View | |
| 18098723 | Memory Sharing Electronic Circuit System And External Device Capable Of Storing Data In Host Device | Patented | View | |
| 16827205 | Unidirectional Information Channel To Monitor Bidirectional Information Channel Drift | Abandoned | View | |
| 18339024 | Branch Prediction Method, Branch Prediction Apparatus, Processor, Medium, And Device | Patented | View |
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