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| Art Unit: | 2138 — Electrical computers and digital processing systems: memory |
|---|---|
| Group: | 2130 — Memory Access and Control |
| Classes: |
711 — Electrical computers and digital processing systems: memory 717 — Data processing: software development, installation, and management 713 — Electrical computers and digital processing systems: support |
| Phone: | (571) 272-8193 |
| Email: | michael.krofcheck@uspto.gov |
| Location: | VA 22314 |
| Title: | Pat Examnr Elctrl Engrg |
| Service: | 21 years |
| Grade: | GS-14 |
| 3-Year Grant rate: | 83% over 249 cases |
|---|---|
| Difficulty: | Easier |
| Difficulty Percentile: | 37th
|
With Examiner Krofcheck, you have a 83% chance of getting an issued patent by 3 years after the first office action. Examiner Krofcheck is an easier examiner and in the 37th percentile across all examiners (with 100th percentile most difficult).
Below is the grant rate timeline for Examiner Krofcheck, where the timeline is relative to the date of the first office action. The three-year grant rate is the percentage of applications granted at three years after the first office action.
Examiner Krofcheck's grant rate is lower than that of Art Unit 2138 and higher than that of the USPTO.
| Average Office Actions Per Grant | |
|---|---|
| Examiner Krofcheck | 1.8 |
| Art Unit 2138 | 1.2 |
Examiner Krofcheck has granted 128 of 158 cases without any applicant-requested interviews for a grant rate of 81%.
Examiner Krofcheck has granted 78 of 91 cases with at least one applicant-requested interview for a grant rate of 86%.
With Examiner Krofcheck, conducting an interview increases your chance of getting a patent granted by 6%.
| Number | Title | OA Rejections | Status | IFW |
|---|---|---|---|---|
| 18778627 | Locked Raid With Compression For Memory Interconnect Applications | Rejection information available with a Premium Stats subscription. See our pricing. | Patented | View |
| 18634147 | Reconfigurable Partitioning Of High Bandwidth Memory | Patented | View | |
| 18399656 | Traffic Aware Smart Caching In Fabric Switches | Patented | View | |
| 18793948 | Processor Suitable For Multi-Segment Accessing Memory And Operation Method Thereof | Patented | View | |
| 18928734 | Nand-Based Storage Device With Partitioned Nonvolatile Write Buffer | Patented | View | |
| 18227178 | Utilizing A Single Buffer For A Dynamic Number Of Players, Each Using A Dynamically Sized Buffer | Patented | View | |
| 18779781 | Read-Modify-Write For Lossless Tiling In Convolution Networks | Patented | View | |
| 18795186 | Memory Device And In-Memory Searching Method | Patented | View | |
| 18189104 | Memory Controller Capable Of Preventiing Decrease In Use Efficiency Of Memory, Control Method For Controlling Memory Controller, And Storage Medium Therefor | Abandoned | View | |
| 18437583 | Method And Device For Accessing Data In Host Memory | Patented | View | |
| 18584151 | Methods And Apparatus To Reduce Read-Modify-Write Cycles For Non-Aligned Writes | Patented | View | |
| 18129397 | Cost-Aware Caching Of Objects From A Data Store | Abandoned | View | |
| 18535050 | Memory Controller Controlling Read Operations For Prefetching Data And Storage Device Including The Same | Patented | View | |
| 18338055 | An Apparatus For A First Device Mmio Mapped With A Second Device And A Method Of Performing Data Processing Operations Therebetween | Patented | View | |
| 18344365 | Durable Asynchronous Replication In A Distributed Storage System | Patented | View | |
| 15994035 | Writing Parity Data To A Targeted Wordline | Patented | View | |
| 18393803 | Memory With Redundant Replacement Resources And Electronic Device | Patented | View | |
| 18760305 | Prevention Of Ram Access Pattern Attacks Via Selective Data Movement | Patented | View | |
| 18534355 | Cache With Guarantee Of Current Data | Patented | View | |
| 18779352 | Non-Volatile Memory Device Performing Reset Operation, Storage Device Including The Same, Method Of Operating The Same | Patented | View | |
| 18632946 | Caching Strategy Based On Model Execution Time, Frequency And Input Order With Configurable Priority | Patented | View | |
| 18419806 | Providing Data Storage Resiliency | Patented | View | |
| 18111911 | Nand Flash Memory Controller Capable Of Adjusting Its Processing Power According To Its Speed | Patented | View | |
| 16836672 | Techniques For Tensor Memory Allocation | Patented | View | |
| 18603941 | Method Of Increasing Flash Endurance By Improved Metadata Management | Patented | View | |
| 17896884 | Data Processing Method For Memory Device, Apparatus, And System | Patented | View | |
| 18508112 | Memory Device Region Allocation Using Lifetime Hints | Patented | View | |
| 18336911 | Read Voltage Calibration Method, Memory Storage Device And Memory Control Circuit Unit | Patented | View | |
| 18417840 | Memory Device, Operating Method Of Memory Device, And Storage Device | Patented | View | |
| 18442676 | Memory-Aware Pre-Fetching And Cache Bypassing Systems And Methods | Patented | View | |
| 18335182 | Composable Infrastructure Module | Patented | View | |
| 18336564 | Systems And Methods For Decentralized Address Translation | Patented | View | |
| 18088604 | Method For Storing Data And Parity Data In Different Chip Enabled Regions, Memory Storage Device And Memory Control Circuit Unit | Patented | View | |
| 18322931 | Generating Data Protection Directives To Provide To A Storage Controller To Control Access To Data In Cache | Patented | View | |
| 18660070 | Host Verification For A Memory Device | Patented | View | |
| 18185826 | Data Storage Arrangement And Method For Anonymization Aware Deduplication | Patented | View | |
| 18188147 | Providing Counters In A Data Processor | Patented | View | |
| 18402572 | Flash Memory Chip That Modulates Its Program Step Voltage As A Function Of Chip Temperature | Patented | View | |
| 18538329 | Power Tearing Protection Within A Non-Volatile Memory (Nvm) | Patented | View | |
| 18428157 | Memory Systems And Devices Including Examples Of Accessing Memory And Generating Access Codes Using An Authenticated Stream Cipher | Patented | View | |
| 18024590 | Addressing For Disaggregated Memory Pool | Patented | View | |
| 18064020 | Updating Related Data In Multi-Cache Systems | Patented | View | |
| 18099905 | Systems, Methods, And Devices For Using A Reclaim Unit Based On A Reference Update In A Storage Device | Patented | View | |
| 18066161 | Host Device Performing Near Data Processing Function And Accelerator System Including The Same | Patented | View | |
| 17852059 | Control Of Deterministic Machine Learning Systems Using Trigger Tables And Configuration State Registries | Patented | View | |
| 17031659 | Cache And Memory Content Management | Abandoned | View | |
| 18538160 | Bypassing Program Counter Match Conditions | Patented | View | |
| 18340920 | Enabling User-Based Instant Access From File Based Backups | Patented | View | |
| 18270461 | Hash Optimized Composition Cache For Isolated Execution Environments | Abandoned | View | |
| 18078762 | Device, Method And System To Supplement A Cache With A Randomized Victim Cache | Abandoned | View |
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