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| Art Unit: | 2137 — Electrical computers and digital processing systems: memory |
|---|---|
| Group: | 2130 — Memory Access and Control |
| Classes: |
711 — Electrical computers and digital processing systems: memory 718 — Electrical computers and digital processing systems: virtual machine task or process management or task management/control 706 — Data processing: artificial intelligence |
| Phone: | (571) 270-1377 |
| Email: | ryan.bertram@uspto.gov |
| Location: | VA 22314 |
| Title: | Pat Examnr Compr Engrg |
| Service: | 20 years |
| Grade: | GS-14 |
| 3-Year Grant rate: | 92% over 275 cases |
|---|---|
| Difficulty: | Very Easy |
| Difficulty Percentile: | 12th
|
With Examiner Bertram, you have a 92% chance of getting an issued patent by 3 years after the first office action. Examiner Bertram is a very easy examiner and in the 12th percentile across all examiners (with 100th percentile most difficult).
Below is the grant rate timeline for Examiner Bertram, where the timeline is relative to the date of the first office action. The three-year grant rate is the percentage of applications granted at three years after the first office action.
Examiner Bertram's grant rate is higher than that of Art Unit 2137 and higher than that of the USPTO.
| Average Office Actions Per Grant | |
|---|---|
| Examiner Bertram | 1.2 |
| Art Unit 2137 | 1.4 |
Examiner Bertram has granted 180 of 194 cases without any applicant-requested interviews for a grant rate of 93%.
Examiner Bertram has granted 73 of 81 cases with at least one applicant-requested interview for a grant rate of 90%.
With Examiner Bertram, conducting an interview decreases your chance of getting a patent granted by 3%.
| Number | Title | OA Rejections | Status | IFW |
|---|---|---|---|---|
| 18920994 | Data Storage System And Method Of Managing Metadata Thereof | Rejection information available with a Premium Stats subscription. See our pricing. | Patented | View |
| 18754158 | Cache Look Up During Packet Processing By Uniformly Caching Non-Uniform Lengths Of Payload Data In A Dual-Stage Cache Of Packet Processors | Patented | View | |
| 17824413 | Visualizing Memory Bandwidth Utilization Using Memory Bandwidth Stack | Patented | View | |
| 18678346 | Identification And Storage Of Boot Information At A Memory System | Patented | View | |
| 18623321 | Discovery Controller With Feature Discovery For Data Storage Devices | Patented | View | |
| 18596993 | Mapping Storage Objects To Storage Tiers Using Digital Twins | Patented | View | |
| 18829891 | Storage System And State Management Method For Resource Operation | Abandoned | View | |
| 18789588 | Managing Memory Space Allocation | Patented | View | |
| 18677820 | Systems And Methods For Data Storage In A Storage Device | Patented | View | |
| 18760950 | Dynamically Assigning Storage Objects To Compartment Constructs Of A Storage System To Reduce Application Risk | Patented | View | |
| 18481246 | Storage Device With Improved Read Performance And Operation Method Thereof | Patented | View | |
| 18464711 | Managing Operational State Data In Memory Module | Patented | View | |
| 18668893 | Mechanism For Efficient Accessing To Memory Controllers With Non-Power-Of-Two Sized Memory | Patented | View | |
| 18644942 | Multi-Cloud Tiering Translation To Enterprise Tiers | Patented | View | |
| 18597292 | System And Method For Improved Memory Allocation And Management | Patented | View | |
| 18419111 | Resource Allocation Method And Apparatus | Patented | View | |
| 18737737 | Optimizing Memory Usage In Physical Memory | Patented | View | |
| 18421309 | Board Management Controller And Method For Storing Sensor Data In Board Management Controller | Patented | View | |
| 18615691 | Handling Memory Requests | Patented | View | |
| 18741452 | Storage Devices Having Multiple Storage Regions | Patented | View | |
| 18667685 | Method, Device, And Computer Program Product For Garbage Collection For Storage System | Patented | View | |
| 18422219 | End-Of-Life Data Page Processing | Patented | View | |
| 18617019 | Variable Page Size Architecture | Patented | View | |
| 18742897 | Reservation Station With Primary And Secondary Storage Circuits For Store Operations | Patented | View | |
| 18632049 | Temperature Monitoring For Memory Devices | Patented | View | |
| 18594070 | Memory System And Method Of Controlling Memory Chips | Patented | View | |
| 18122566 | Method And Apparatus For Managing Concurrent Access To A Shared Resource Using Patchpointing | Patented | View | |
| 18447813 | Address Translation Service For Host Queues | Patented | View | |
| 18649521 | System And Method For Importing And Exporting Data Between Tapes To Cloud Storage | Patented | View | |
| 18757798 | Selectable Slice Mapping | Patented | View | |
| 18226720 | Memory Controller And Memory System Performing Data Search Based On Logical-To-Physical Mapping Table | Patented | View | |
| 18302604 | Data Block Allocation For Storage System | Patented | View | |
| 18498256 | Method, Electronic Device, And Computer Program Product For Expanding Storage Device Cluster | Patented | View | |
| 18431101 | Closing Block Family Based On Soft And Hard Closure Criteria | Patented | View | |
| 18495929 | Adaptively Selecting Compression Process Based On End-To-End Performance | Patented | View | |
| 18655383 | Leveraging Recurrent Patterns Of Raid Members Distribution For Efficient Array Growth | Patented | View | |
| 18644943 | Identification Of Storage Backends To Higher-Level Processes To Perform Storage Volume Management | Patented | View | |
| 18447046 | Method For Host Access To Network Device-Managed Memory Pool | Patented | View | |
| 17982951 | Storage Device Including Memory Controller And Operating Method Of The Same | Patented | View | |
| 18684941 | Distributed Storage Space Management Method, Computing Device And Storage Medium | Patented | View | |
| 18447738 | Dynamic Mode Selection For Hybrid Single-Level Cell And Multi-Level Cell Data Storage Devices | Patented | View | |
| 18359704 | Firmware Scheme For 3 Tier Memories | Patented | View | |
| 18018801 | A High-Performance Computing System | Patented | View | |
| 18386855 | Memory Device, Memory Control Device And Operating Method Of Memory Device For Checking Command And Address (Ca) Signal With Predetermined Pattern Of Command | Patented | View | |
| 17706582 | Native Key-Value Storage Enabled Distributed Storage System | Abandoned | View | |
| 18130650 | Operation Method Of Host Configured To Communicate With Storage Devices And Memory Devices, And System Including Storage Devices And Memory Devices | Patented | View | |
| 18865206 | Method And Apparatus For Adjusting Disk Sequences Of Hard Disk Backplanes, Storage Medium, And Electronic Device | Patented | View | |
| 18415459 | Performance Control For A Memory Sub-System | Patented | View | |
| 18516632 | Memory System | Patented | View | |
| 18598100 | Namespace Size Adjustment In Non-Volatile Memory Devices | Patented | View |
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