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| Art Unit: | 2112 — Error detection/correction and fault detection/recovery |
|---|---|
| Group: | 2110 — Computer Error Control, Reliability, & Control Systems |
| Classes: |
714 — Error detection/correction and fault detection/recovery 706 — Data processing: artificial intelligence |
| Phone: | (571) 270-1729 |
| Email: | enam.ahmed@uspto.gov |
| Location: | VA 22314 |
| Title: | Patent Examiner Computer Science |
| Service: | 20 years |
| Grade: | GS-13 |
| 3-Year Grant rate: | 88% over 237 cases |
|---|---|
| Difficulty: | Easier |
| Difficulty Percentile: | 24th
|
With Examiner Ahmed, you have a 88% chance of getting an issued patent by 3 years after the first office action. Examiner Ahmed is an easier examiner and in the 24th percentile across all examiners (with 100th percentile most difficult).
Below is the grant rate timeline for Examiner Ahmed, where the timeline is relative to the date of the first office action. The three-year grant rate is the percentage of applications granted at three years after the first office action.
Examiner Ahmed's grant rate is lower than that of Art Unit 2112 and higher than that of the USPTO.
| Average Office Actions Per Grant | |
|---|---|
| Examiner Ahmed | 1.6 |
| Art Unit 2112 | 1.1 |
Examiner Ahmed has granted 185 of 208 cases without any applicant-requested interviews for a grant rate of 89%.
Examiner Ahmed has granted 23 of 29 cases with at least one applicant-requested interview for a grant rate of 79%.
With Examiner Ahmed, conducting an interview decreases your chance of getting a patent granted by 11%.
| Number | Title | OA Rejections | Status | IFW |
|---|---|---|---|---|
| 18802199 | Memory System And Memory Management Method Thereof | Rejection information available with a Premium Stats subscription. See our pricing. | Patented | View |
| 18390349 | Rate Matching Methods For Ldpc Codes | Patented | View | |
| 18660589 | Error Correction Code Engine Of Semiconductor Memory Device And Semiconductor Memory Device | Patented | View | |
| 18541846 | Input Voltage Degradation Detection | Patented | View | |
| 18430328 | Electronic System And Method Of Managing Errors Of The Same | Patented | View | |
| 18733701 | System And Method For Developing And Debugging A Silicon Production Test Program For Semiconductor Devices | Patented | View | |
| 18295681 | Soft-Decision Decoding Method And Apparatus | Abandoned | View | |
| 18594222 | System And Method For Generation Of Error-Correcting Codes In Communication Systems | Patented | View | |
| 18355787 | Secured Failover Access Through Data Storage Device Side Channels | Patented | View | |
| 18594656 | Hardware Memory Error Tolerant Software System | Patented | View | |
| 17529925 | Error Type Indication | Patented | View | |
| 18680470 | Evaluation Of Memory Device Health Monitoring Logic | Patented | View | |
| 18535320 | Method Of Identifying A System-Wide Failure And System Therefor | Abandoned | View | |
| 18482517 | Method And Apparatus For Encoding And Decoding Of Low Density Parity Check Codes | Patented | View | |
| 18354177 | Electrostatic Discharge Detection And Data Storage Device Reaction | Patented | View | |
| 17544085 | Adaptive Device Data Correction With Increased Memory Failure Handling | Patented | View | |
| 18169185 | Circuit For Controlling Calibration, Electronic Device, And Method For Controlling Calibration | Patented | View | |
| 18164618 | Failure Analysis And Detection Method For Memory | Patented | View | |
| 18308275 | Self-Adaptable Accelerators Having Alternating Production/optimizing Modes | Patented | View | |
| 18024468 | Digital Radio Receivers | Patented | View | |
| 18545772 | Constructing Quantum Processes For Quantum Processors | Patented | View | |
| 18332647 | Method Of Performing A Multiplication And Accumulation (Mac) Operation In A Processing-In-Memory (Pim) Device | Patented | View | |
| 18350509 | Scan Chains With Multi-Bit Cells And Methods For Testing The Same | Patented | View | |
| 18355157 | Memory Device, Memory System, And Method Of Operating The Same | Patented | View | |
| 17367161 | Early Termination In Convolutional Low Density Parity Check Decoding | Patented | View | |
| 17821252 | Semiconductor Device Having Syndrome Generator | Patented | View | |
| 17971346 | Partitioned Memory Having Error Detection Capability | Patented | View | |
| 17677593 | Associative Computing For Error Correction | Patented | View | |
| 17810093 | Secure Non-Volatile Memory | Patented | View | |
| 17977599 | Embedded Memory Transparent In-System Built-In Self-Test | Patented | View | |
| 17375622 | Processing-In-Memory (Pim) Devices | Patented | View | |
| 17645972 | Randomized Transforms In A Dispersed Data Storage System | Patented | View | |
| 17580359 | Read-Disturb-Based Read Temperature Time-Based Attenuation System | Patented | View | |
| 17944744 | Header Decoding Mechanism For Tape Storage | Patented | View | |
| 18075275 | Managing Dynamic Temperature Throttling Thresholds In A Memory Subsystem | Patented | View | |
| 17900876 | Test Device And Test Method Thereof | Patented | View | |
| 17848004 | Device Modification Analysis Framework | Patented | View | |
| 16066915 | System And Method For Generation Of Error-Correcting Codes In Communication Systems | Patented | View | |
| 17456821 | Storage Device With Data Deduplication, Operation Method Of Storage Device, And Operation Method Of Storage Server | Patented | View | |
| 17551767 | Hardware Memory Error Tolerant Software System | Patented | View | |
| 18174648 | Memory And Operation Method Of Memory | Patented | View | |
| 17580888 | Read-Disturb-Based Read Temperature Determination System | Patented | View | |
| 17883027 | Memory Device Protection | Patented | View | |
| 18167992 | Efficient Management Of Failed Memory Blocks In Memory Sub-Systems | Patented | View | |
| 17308177 | Cubic Low-Density Parity-Check Code Encoder | Patented | View | |
| 17807303 | Memory Section Selection For A Memory Built-In Self-Test | Patented | View | |
| 18059321 | Dynamic Fail-Safe Redundancy In Aggregated And Virtualized Solid State Drives | Patented | View | |
| 17483628 | Method And Circuit For At-Speed Testing Of Multicycle Path Circuits | Patented | View | |
| 18097629 | Artificial Neural Network Training In Memory | Patented | View | |
| 17480661 | Enhanced Checksum System | Patented | View |
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Disclaimer: We do not provide any guarantees as to the accuracy of the statistics presented above and under
no circumstances will we be liable for any outcome resulting from your reliance on the above statistics.