Examiner Sandifer Matthew D

2151-SANDIFER-MATTHEW-D

Employment Information

Art Unit:2151 — Electrical computers: arithmetic processing and calculating
Group:2100 Search — Search and Classification
Classes: 708 — Electrical computers: arithmetic processing and calculating
706 — Data processing: artificial intelligence
712 — Electrical computers and digital processing systems: processing architectures and instruction processing (e.g., processors)
714 — Error detection/correction and fault detection/recovery
713 — Electrical computers and digital processing systems: support
709 — Electrical computers and digital processing systems: multicomputer data transferring
375 — Pulse or digital communications
703 — Data processing: structural design, modeling, simulation, and emulation
711 — Electrical computers and digital processing systems: memory
382 — Image analysis
Phone:(571) 270-5175
Email:matthew.sandifer@uspto.gov
Location:VA 22314
Title:Pat Examnr Compr Engrg
Service:17 years
Grade:GS-14

Grant Rate and Difficulty Ranking

15
3-Year Grant rate: 91% over 330 cases
Difficulty: Very Easy
Difficulty Percentile: 15th

With Examiner Sandifer, you have a 91% chance of getting an issued patent by 3 years after the first office action. Examiner Sandifer is a very easy examiner and in the 15th percentile across all examiners (with 100th percentile most difficult).

Grant Rate

Grant Rate Timeline

Below is the grant rate timeline for Examiner Sandifer, where the timeline is relative to the date of the first office action. The three-year grant rate is the percentage of applications granted at three years after the first office action.

Comparison with Art Unit 2151

Examiner Sandifer's grant rate is higher than that of Art Unit 2151 and higher than that of the USPTO.

Average Office Actions Per Grant
Examiner Sandifer 1.0
Art Unit 2151 1.4

Interview Benefit

Grant Rate without Interview

Examiner Sandifer has granted 225 of 246 cases without any applicant-requested interviews for a grant rate of 91%.

Grant Rate with Interview

Examiner Sandifer has granted 74 of 84 cases with at least one applicant-requested interview for a grant rate of 88%.

Interview Benefit

With Examiner Sandifer, conducting an interview decreases your chance of getting a patent granted by 3%.

Recent Dispositions

Recent Dispositions

Number Title OA Rejections Status IFW
17939654 Systolic Parallel Galois Hash Computing Device Rejection information available with a Premium Stats subscription. See our pricing. Patented View
18754719 Bit Matrix Multiplication Patented View
17485342 Learning Static Bound Management Parameters For Analog Resistive Processing Unit System Patented View
17680436 Dynamic Algorithm Selection Patented View
18444249 Low Latency Matrix Multiply Unit Patented View
19046863 Aeroelectromagnetic Data Inversion Method And System Based On Approximate Jacobian Matrix Abandoned View
17840908 Apparatus And Method For Performing Accumulation Operations Patented View
17490037 Decomposing Matrices For Processing At A Processor-In-Memory Patented View
18587519 Systems And Methods Employing Unique Device For Generating Random Signals And Metering And Addressing, E.g., Unusual Deviations In Said Random Signals Patented View
19097839 Methods For Designing High Freedom Parameterized Frequency-Modulated Coded Waveform Patented View
17761116 Charge-Domain In-Memory Computing Circuit Patented View
17391718 Folding Column Adder Architecture For Digital Compute In Memory Patented View
18602936 Combinatorial Logic Circuits With Feedback Patented View
17576898 Memory Device And Method For Computing-In-Memory (Cim) Patented View
17465462 Systems And Methods For Analyzing Stability Using Metal Resistance Variations Patented View
17225915 Multiplication And Accumulation (Mac) Operator And Processing-In-Memory (Pim) Device Including The Mac Operator Patented View
17500568 Systems And Methods For Single Chip Quantum Random Number Generation Patented View
17551876 Sgcnax: A Scalable Graph Convolutional Neural Network Accelerator With Workload Balancing Patented View
19201747 High Precision Analog Optical Computing Method And System Based On Bit Slice Patented View
19011658 Method And Apparatus For Lightweighting Of Artificial Intelligence Model Using Dequantization Patented View
18739768 Method And Apparatus For Implied Bit Handling In Floating Point Multiplication Patented View
17686409 Computing Device, Computing Apparatus And Method Of Warp Accumulation Patented View
17138733 Techniques To Perform Operations With Matrix Multiply Accumulate (Mma) Circuitry Patented View
17044799 Data Prediction Device, Method, And Program Abandoned View
18603800 Multiple Mode Arithmetic Circuit Patented View
19051126 Adaptive Model Updating Algorithm For Probabilistic Analysis Of Complex Engineering Structures Patented View
17683284 Mac Processing Pipelines, Circuitry To Configure Same, And Methods Of Operating Same Patented View
17388285 Circuitry For Performing A Multiply-Accumulate Operation Patented View
18969422 Techniques For Generating Synthetic Data Patented View
17163855 Dynamic Directional Rounding Patented View
17112528 Four-Bit Training For Machine Learning Patented View
19176288 System Having Multiple Buses And Method For Controlling Processing Core In The System Patented View
17682167 Method And Architecture For Serial Link Characterization By Arbitrary Size Pattern Generator Patented View
17393492 High Throughput Linear Feedback Shift Register Patented View
17643256 Solving Optimization Problems With Photonic Crossbars Patented View
17360737 Fourier Transform Device And Fourier Transform Method Abandoned View
18901245 Collective Communication Optimization Method For Global High-Degree Vertices, And Application Patented View
17609123 Random Number Generation Unit And Computing System Patented View
17651422 Memory Array Structure With Dynamic Differential-Reference Based Readout Scheme For Computing-In-Memory Applications, Dynamic Differential-Reference Time-To-Digital Converter For Computing-In-Memory Applications And Computing Method Thereof Patented View
18833896 Dynamic Maximal Clique Enumeration Device And Method Based On Fpga With Hbm Patented View
19028818 Matrix Decomposition Structure Of Two-Channel Quadrature Mirror Filter Bank And Coefficient Design Method Thereof Patented View
17536002 Time-Based Multiply-And-Accumulate Computation Patented View
17687631 Method And Apparatus For True Random Number Generator Based On Nuclear Radiation Patented View
17223324 Neural Network Device For Neural Network Operation, Method Of Operating Neural Network Device, And Application Processor Including Neural Network Device Patented View
17401201 Semiconductor Device Capable Of Performing In-Memory Processing Patented View
18746561 Processing Core With Data Associative Adaptive Rounding Patented View
18892274 Processing Device Using Heterogeneous Format Input Patented View
19005765 Calculator Capable Of Outputting Results Based On Handwritten Formulas Patented View
17317844 Memory Bit Cell For In-Memory Computation Patented View
17279096 Secure Right Shift Computation System, Secure Division System, Methods Therefor, Secure Computation Apparatus, And Program Patented View

Appeals Statistics

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